Job Description

Circuit Layout Designer

Job Title: Circuit Layout Designer

Location: Santa Clara, CA

Pay Rate: $60-$80/Hr. on W-2

# of opening(s): 1

Note: This position is only available to candidates who do not require sponsorship. The candidate must work on W-2 only; no C-2-C or third-party candidates are permitted. There is no employer involvement.

Job Description:

Job type: CMOS Deep submicron mask design (analog, custom digital layout)

Tools: Cadence Virtuoso layout editor on Linux

Experience:

• At least 5 years of mask design layout experience in recent deep submicron CMOS (16nm, 7nm, 5nm, 3nm, 2nm)
• Proficient in Virtuoso XL layout editor
• Understand and execute the high-quality CMOS layout using DRC/LVS with Calibre, ICV or similar tools.
• At least 3 years of analog, mix-signal custom layout experience
• High-speed circuit layout experience is a plus

Equal Opportunity Employer/Veterans/Disabled

Our associates' benefits include medical, dental, vision, life insurance, short-term disability, additional voluntary benefits, an Employee Assistance Program (EAP), commuter benefits, and a 401 (k) plan. Our benefit offerings enable employees to select the type of coverage that best meets their needs. In addition, our associates may be eligible for paid leave, including Paid Sick Leave or any other paid leave required by Federal, State, or local law, as well as Holiday pay where applicable. Disclaimer: These benefit offerings do not apply to client-recruited jobs or direct hires to a client.

Please visit to read our Candidate Privacy Information Statement, which explains how we will use your information.

The Company will consider qualified applicants with arrest and conviction records by federal, state, and local laws and/or security clearance requirements, including, as applicable:

• The California Fair Chance Act
• Los Angeles City Fair Chance Ordinance
• Los Angeles County Fair Chance Ordinance for Employers
• San Francisco Fair Chance Ordinance

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